GaN vs SiC in Automotive Onboard Chargers: Why Gallium Nitride Is Winning the Sub-50 kW EV Charging Race

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GaN (Gallium Nitride) HEMTs (Gallium Nitride High-Electron-Mobility Transistors) are displacing SiC MOSFETs in automotive Onboard Chargers (OBCs) because their zero reverse-recovery charge (Qrr ≈ 0) enables bridgeless totem-pole PFC topologies to switch at 100–500 kHz — four times the practical SiC ceiling — yielding 30–60% smaller magnetics, power densities above 2.2 kW/L, and peak efficiencies above 98.4%. However, this performance is topology-dependent: a hard-switched interleaved boost PFC running GaN devices — as evaluated by Mehrotra et al. (SAE 2024-26-0134, AVL India) in a 7.2 kW OBC — generates 89.57 W of total system loss versus SiC’s 65.43 W, pushing junction temperatures above 160°C at 65°C ambient. The resolution of this apparent contradiction is the central engineering thesis of this article: the SAE paper’s baseline exposes GaN’s limits inside a legacy hard-switched topology; modern automotive GaN OBCs mandate Zero-Voltage Switching (ZVS) / Triangular Current Mode (TCM) architectures that eliminate switching losses entirely and unlock GaN’s true efficiency ceiling of >98.4%. SiC remains dominant in 800V+ traction inverters, where its 1,200V breakdown and 3.7 W/cm·K thermal conductivity are irreplaceable.

What Is an Onboard Charger (OBC) — and Why Does the Semiconductor Choice Matter?

▸ Direct Answer An Onboard Charger (OBC) is the power electronics module inside every BEV that converts single-phase or three-phase AC grid power into regulated DC voltage for the high-voltage battery pack. Its semiconductor switching stage determines the OBC’s efficiency, physical size, cost, and bidirectional V2G capability.

Every electric vehicle contains a high-power conversion stage that most owners never think about: the Onboard Charger. When plugged into a 7.2 kW AC home wallbox, the OBC rectifies, isolates, and regulates grid AC into the precise DC voltage the battery pack requires — all at efficiencies above 96%, inside a housing roughly the size of a hardback book. What happens at the semiconductor level inside that housing determines everything from the OBC’s weight and packaging volume to its long-term reliability and V2G export capability.

Silicon Carbide (SiC) MOSFETs entered automotive power electronics first, supported by supply chains from Wolfspeed, Infineon, STMicroelectronics, and ROHM. SiC dominates the traction inverter market because its 1,200V breakdown voltage and 3.7 W/cm·K thermal conductivity handle the voltage and thermal stresses of 800V battery buses with margins that silicon IGBTs cannot match. But in the OBC — where power stages peak at 6.6 kW to 22 kW, input voltages stay below 264 VAC, and the engineering premium is on shrinking magnetic components — Gallium Nitride (GaN) High Electron Mobility Transistors (HEMTs) now have a structurally decisive technical advantage, provided they are deployed in the correct soft-switching topology.

In November 2024, Changan Automobile launched the Qiyuan E07 — the world’s first series-production EV with a commercial GaN-based OBC, using Navitas GaNSafe 650V devices. IDTechEx’s Power Electronics for EVs 2025–2035 forecast had placed GaN OBC commercial entry in 2026; Changan beat it by two years. That deployment confirms that AEC-Q101 qualification, gate-drive integration, and supply chain readiness have all been resolved ahead of schedule.

[ FIGURE : Normalised material property radar chart — Si IGBT vs SiC MOSFET vs GaN HEMT across six OBC-critical engineering axes: (1) Bandgap [eV], (2) Breakdown field [MV/cm], (3) Switching speed [ns turn-on], (4) Thermal conductivity [W/cm·K], (5) Low R_DS(on) at voltage, (6) OBC suitability composite score. Note: OBC suitability is weighted for sub-50 kW AC-DC conversion duty; traction inverter weighting would reorder SiC above GaN. ]

▸ Source: MDPI Energies 2025 (GaN EV Systems Comparative Review); Wolfspeed E3M datasheet; Reali, A. et al., MDPI Micromachines 15.12 (2024): 1470.

The SAE 2024-26-0134 Benchmark: What Hard-Switching GaN Topology Data Really Tells Us

▸ Direct Answer SAE Technical Paper 2024-26-0134 (Mehrotra et al., AVL India) benchmarks a 7.2 kW GaN OBC in a traditional hard-switched Interleaved Boost PFC topology and finds GaN’s total losses (89.57 W) exceed SiC’s (65.43 W) at 65°C ambient — a finding that is accurate, important, and topology-specific. It does not indict GaN; it precisely defines where GaN fails without ZVS/TCM soft-switching architecture.

The Hard-Switching Penalty: Why the SAE Baseline Is a Cautionary Benchmark

SAE Technical Context (Mehrotra et al., AVL India, 2024-26-0134) Mehrotra et al. (SAE 2024-26-0134, AVL India) evaluated a 7.2 kW interleaved boost PFC OBC using hard-switched GaN HEMTs. Key findings: Total GaN system losses: 89.57 W vs. SiC: 65.43 W — a 37% loss penalty for GaN in this topology.At 65°C ambient, GaN junction temperature exceeded 160°C, requiring 96.4 W of active cooling power.Net system efficiency with cooling overhead: 97.2% (GaN) vs. 98.1% (SiC) in this hard-switched baseline. These figures are accurate and reproducible. They represent the ceiling of GaN performance inside a hard-switched topology — not the ceiling of GaN as a material or device technology.

The root cause of this thermal penalty in hard-switched operation is twofold. First, dynamic R_DS(on) current collapse: charge trapping in the GaN buffer layer temporarily elevates on-resistance by 5–15% under hard-switching conditions, increasing conduction losses beyond the nominal datasheet value. Second, substrate thermal conductivity: GaN’s 1.3 W/cm·K substrate (grown on silicon) is 2.8× lower than SiC’s 3.7 W/cm·K. In a hard-switched topology where both switching and conduction losses generate significant die-level heat flux, this substrate disadvantage cannot be overcome by thermal management alone at high ambient temperatures.

The Interleaved Boost PFC is a proven, widely-deployed topology, and Mehrotra et al.’s simulation is technically rigorous. The important engineering context is that this topology was not designed to leverage GaN’s key physical advantages — zero Qrr and ultra-low Coss. Deploying GaN in a circuit architecture optimised for SiC’s hard-switching characteristics produces exactly the result the SAE paper measured: higher switching losses, worse thermal stress, and inferior net efficiency. The topology mismatch is the variable, not the semiconductor material.

The Topology Pivot: From Hard-Switching to ZVS/TCM — Unlocking GaN’s True Potential

Engineering Best Practice Modern automotive GaN OBC design mandates soft-switching topologies — specifically Zero-Voltage Switching (ZVS) or Triangular Current Mode (TCM) — that are architecturally built around GaN’s physical properties: ZVS/TCM eliminates switching losses entirely: the switch turns on only after its drain voltage reaches zero, so the capacitive turn-on loss (½ × Coss × V²) is zero regardless of switching frequency.Current collapse bypassed: without hard-switching transitions, there are no high dV/dt events that trigger GaN buffer charge trapping. Dynamic R_DS(on) elevation does not occur in full-ZVS operating conditions.GaN’s low Coss (50–120 pF) becomes an asset, not a liability: it requires minimal resonant dead time for ZVS, enabling higher practical switching frequencies (100–500 kHz) with full efficiency retention. University of Bologna’s 2024 GaN OBC prototype (Reali et al., MDPI Micromachines 15.12, 2024) and Navitas’ monolithic GaNSafe layouts both deploy full-cycle ZVS. Measured results: >98.4% system efficiency, 2.2 kW/L power density, stable operation at 60°C ambient with standard liquid cold plate — no 160°C junction crisis.

Loss Component	Hard-Switched Interleaved Boost PFC (SAE)	ZVS Totem-Pole PFC (Bologna)
Switching Losses	Quantitatively High	Near Zero
Conduction Losses	Moderate	Moderate
Dynamic RDS(on)	Present	Present
Gate-Drive Losses	Low	Low
Thermal Overhead	High	Reduced

Wide Bandgap (WBG) Physics: How GaN’s 2DEG Structure Unlocks Zero Reverse Recovery

▸ Direct Answer GaN HEMTs achieve near-zero reverse recovery charge (Qrr ≈ 0) because they conduct reverse current through the transistor channel — formed by the two-dimensional electron gas (2DEG) at the AlGaN/GaN heterojunction — rather than through a p-n body diode. Without a body diode, there is no minority carrier charge to recover at turn-off, which is the root physical cause of hard-switching losses that limit SiC and Si OBCs to lower switching frequencies.

Bandgap, Breakdown Field, and the 2DEG Electron Channel

Wide Bandgap (WBG) semiconductors — SiC at 3.26 eV and GaN at 3.4 eV — support breakdown electric fields 5–10× higher than silicon’s 1.1 eV bandgap allows. This translates directly into thinner drift regions, lower on-resistance at equivalent voltage ratings, and faster switching. The more important distinction for OBC design is the structural difference between SiC and GaN at the device level.

SiC MOSFETs use a vertical device structure — electrons conduct through the bulk crystal from drain to source. GaN HEMTs exploit a fundamentally different mechanism: the two-dimensional electron gas (2DEG) formed at the AlGaN/GaN heterojunction interface. This quantum-well confinement produces electron mobilities of 1,500–2,000 cm²/V·s — more than double SiC’s ~1,000 cm²/V·s — and a lateral device structure with extremely low gate charge (Qg) and near-zero parasitic capacitance (Coss and Crss). Low parasitic capacitance is precisely what allows GaN to switch cleanly at 100–500 kHz without accumulating large capacitive charging losses per switching cycle.

Zero Reverse Recovery: The Property That Makes Totem-Pole PFC Practical

The engineering significance of Qrr = 0 is best understood through the totem-pole Power Factor Correction (PFC) topology. In a standard totem-pole PFC circuit, each switching transition requires the outgoing switch’s body diode to turn off before the incoming switch turns on. In a Si or SiC device, this body diode stores minority-carrier charge during forward conduction; at turn-off, that stored charge must be forcibly extracted — generating a reverse current spike and associated switching losses scaled as Esw ∝ Qrr × VDC × fsw. At 100 kHz, these losses become significant; at 300 kHz, they would destroy efficiency on a SiC totem-pole PFC. GaN’s zero Qrr eliminates this loss term entirely, which is why GaN-based totem-pole PFC prototypes achieve measured efficiencies of 98.4–99.3% at switching frequencies up to 500 kHz (IEEE OSTI 2021; Navitas Semiconductor, 2024).

How Switching Frequency Reduction Transforms Magnetics: V_core ∝ 1/f

Transformer core volume scales inversely with switching frequency — the Faraday’s law relationship V_core ∝ 1/f for a given power level and flux density limit. Moving from 65 kHz (practical SiC ceiling in a PFC stage) to 300 kHz (achievable with GaN) theoretically reduces core volume by a factor of 4 to 5. Real-world gains are 30–60% due to increased core loss at higher frequency (hysteresis and eddy-current losses), but this translates directly into the use of planar transformers — PCB-embedded flat cores with sub-millimetre winding heights — instead of wound ferrite E-cores. Planar transformers also reduce leakage inductance and tighten creepage and clearance management compared to hand-wound alternatives, both critical for IEC 62368 OBC isolation compliance.

According to the University of Bologna’s 2024 GaN OBC prototype (Reali et al., MDPI Micromachines 15.12, 2024), a 6.6 kW bidirectional GaN OBC running a 130 kHz totem-pole PFC stage achieved a power density of 2.2 kW/L at 60°C ambient — compared to 1.2–1.6 kW/L for SiC designs at equivalent thermal conditions. Total OBC mass in the Bologna design was 1.4 kg versus 2.2–2.6 kg for a comparable SiC unit.

Where SiC Still Dominates: The 800V Traction Inverter Is Not GaN’s Market

▸ Direct Answer SiC MOSFETs are the correct semiconductor for 800V EV traction inverters because lateral GaN HEMTs are constrained to approximately 650V breakdown by surface electric-field concentration at the drain edge — insufficient headroom for 700–820V DC bus voltages in modern 800V platforms. SiC vertical trench MOSFETs rated at 1,200V handle this with a 400–500V safety margin.

The 650V Hard Ceiling: Why Lateral GaN Cannot Replace SiC in 800V Inverters

Lateral GaN-on-Si HEMT devices use a surface-parallel conduction channel between source and drain. As drain voltage increases toward rated breakdown, the electric field concentrates at the drain-side edge of the gate metal. Above approximately 650V, this surface field exceeds the AlGaN/GaN material’s critical breakdown field. Commercial GaN devices from Infineon (CoolGaN), Navitas, Transphorm, and GaN Systems are all rated at 650V maximum. For an OBC with 230V AC input, the PFC stage DC link peaks at ~400V and isolation-stage switches see at most 450V in a 400V battery architecture — comfortably inside the 650V ceiling. For an 800V traction inverter whose DC link spans 650–820V depending on battery SoC, a 650V device offers zero safety margin.

Fraunhofer IAF demonstrated 1,200V vertical GaN (vGaN) in June 2024, and ONSemiconductor began sampling 700V and 1,200V vGaN devices in 2025, but these remain pre-production and not yet AEC-Q101 qualified for automotive. SiC holds the traction inverter market through at least 2028–2030 on any credible roadmap.

Conduction Losses: I²·R_DS(on) — Close Enough to Remove as a Differentiator in ZVS OBCs

SiC MOSFET conduction losses follow P_cond = I²·R_DS(on). Wolfspeed’s 3rd-generation E3M 650V SiC MOSFET achieves R_DS(on) as low as 15 mΩ for a large die. In the University of Bologna’s GaN prototype, the 650V, 25 mΩ GaN HEMT was selected as optimal for the 6.6 kW OBC power class. The conduction loss difference between these two devices at peak OBC current (30–35A) is under 0.3% efficiency points — well within measurement uncertainty.

GaN devices carry one additional nuance: dynamic R_DS(on) degradation (current collapse) caused by charge trapping in the GaN buffer layer, which can temporarily elevate on-resistance by 5–15% under hard-switching conditions. As the SAE paper quantifies, this is a real and meaningful loss mechanism in a hard-switched interleaved boost PFC. However, in ZVS topologies — which all production-grade GaN OBC designs use — hard-switching is absent by definition, so current collapse is not a meaningful loss mechanism in a correctly architected GaN OBC stage.

GaN vs SiC vs Si IGBT — 11-Parameter Engineering Comparison for Sub-50 kW OBC Design

The following table compares Si IGBT, SiC MOSFET, and GaN HEMT across the eleven engineering parameters most directly governing sub-50 kW OBC performance, qualification, and long-term cost trajectory. GaN efficiency values are topology-conditional: hard-switching figures are drawn from Mehrotra et al. SAE 2024-26-0134; ZVS/TCM figures are drawn from Reali et al. MDPI Micromachines 2024 and IEEE OSTI 2021.

Engineering Parameter	Si IGBT (Legacy)	SiC MOSFET (Dominant)	GaN HEMT (OBC Leader)
Bandgap (eV)	1.1 eV	3.26 eV	3.4 eV
Max voltage — lateral	650V	1,200–1,700V	650V lateral; 1,200V vGaN sampling 2025
Reverse recovery (Qrr)	High	Low	≈ Zero
Parasitic Coss @ 400V	~3,000 pF	150–300 pF	50–120 pF
Thermal conductivity	1.5 W/cm·K	3.7 W/cm·K	1.3 W/cm·K (GaN-on-Si)
Dynamic R_DS(on) (current collapse)	N/A	Negligible	5–15% in hard-switching; zero in ZVS
Practical OBC switch freq.	<20 kHz	65–130 kHz	100–500 kHz (ZVS)
Peak OBC efficiency — hard-switched	93–94%	98.1% (SAE 2024-26-0134)	97.2% (SAE 2024-26-0134, 7.2 kW)
Peak OBC efficiency — ZVS/TCM	N/A	~97% ceiling	98.4–99.3% (Reali 2024; IEEE OSTI 2021)
AEC-Q101 qualification	Decades	10+ years	2019–2025, multiple suppliers
Substrate cost trajectory	Lowest (Si fab)	Highest (~50% BOM)	Low (GaN-on-Si 200mm lines); ≈SiC by 2028–2030

▸ Sources: Wolfspeed E3M650 datasheet; Transphorm TP65H035WSQA datasheet; Reali et al. MDPI Micromachines 2024; Mehrotra et al. SAE Technical Paper 2024-26-0134 (AVL India); IDTechEx Power Electronics for EVs 2025–2035; Electropages 2024.

Thermal Management, AEC-Q101 Qualification, and Creepage Engineering for Automotive GaN OBCs

▸ Direct Answer GaN HEMTs have lower thermal conductivity (1.3 W/cm·K) than SiC (3.7 W/cm·K), and this disadvantage is real and quantified in hard-switched topologies (SAE 2024-26-0134). In ZVS OBC applications, GaN’s lower total power dissipation — a result of near-zero switching losses — reduces die-level heat flux sufficiently to make standard liquid cold plates adequate at 60°C ambient (Reali et al. 2024). AEC-Q101-qualified automotive GaN devices from Transphorm, Cambridge GaN Devices, and ON Semiconductor now demonstrate junction temperature operation to 175°C.

The Thermal Conductivity Trade-Off: Hard-Switching vs. ZVS Context

SiC’s 3.7 W/cm·K thermal conductivity is 2.8× that of GaN (1.3 W/cm·K). In a hard-switched GaN OBC at 7.2 kW — as measured by Mehrotra et al. — this disadvantage compounds with elevated switching losses to push junction temperatures above 160°C at 65°C ambient, requiring 96.4 W of dedicated cooling power that directly erodes system efficiency from a potential 98%+ to a measured 97.2%. This is the definitive thermal ceiling of GaN in hard-switched duty.

In a ZVS GaN OBC, the thermal equation changes fundamentally. Switching losses — the dominant heat source in high-frequency operation — are eliminated by ZVS architecture. The University of Bologna’s 2024 prototype demonstrated stable continuous operation at 2.2 kW/L power density with a standard liquid cold plate at 60°C ambient — a thermal result achievable precisely because total power dissipation in ZVS mode is lower, despite GaN’s substrate disadvantage. The engineering takeaway is that thermal management complexity is topology-driven, not material-driven in isolation.

AEC-Q101 Qualification Status: GaN Has Crossed the Automotive Gate

AEC-Q101 is the Automotive Electronics Council’s qualification standard for discrete active components, specifying stress tests including High-Temperature Operating Life (HTOL), High-Temperature Reverse Bias (HTRB), and Temperature Humidity Bias (THB). For a decade, the absence of AEC-Q101-qualified GaN devices was the primary barrier to automotive OBC adoption. That barrier has now been fully cleared:

• Transphorm Gen III 650V GaN FETs (TP65H035WSQA, 35 mΩ): AEC-Q101 at 175°C junction temperature, qualified for OBCs, DC-DC converters, and drive inverters (Electronic Design, 2019/2024).

• Cambridge GaN Devices ICeGaN™: AEC-Q101 qualified with integrated gate drive and protection circuits, -40°C to 175°C operating range (Patsnap Industry Report, 2024).

• ON Semiconductor NexFET GaN: full AEC-Q101 with extended HTOL protocols, proprietary gate termination structures for stable V_breakdown across -40°C to 175°C (Patsnap, 2024).

• Navitas GaNSafe: monolithic integration of gate driver, protection, and level-shift into the GaN die, eliminating PCB parasitics that cause spurious turn-on — in production in the Changan Qiyuan E07 OBC (November 2024).

Creepage and Clearance in Planar Transformers

Higher GaN switching frequency enables planar transformers — PCB-integrated flat magnetics with winding heights below 3 mm. Under IEC 62368-1 (the safety standard governing OBC isolation), reinforced insulation between primary and secondary winding requires minimum creepage of 8 mm and clearance of 6 mm for a 400V working voltage at Pollution Degree 2. Planar PCB transformers achieve these distances through controlled PCB layer spacing and conformal coating, rather than relying on wound bobbin geometry — a compliance approach inherently more repeatable in high-volume automotive manufacture.

GaN OBC Topology Decoded: Totem-Pole PFC + Dual Active Bridge in Production

▸ Direct Answer The production GaN OBC architecture combines a bridgeless totem-pole PFC for the AC-DC front-end with a Dual Active Bridge (DAB) or CLLC resonant DC-DC for the isolated battery-side stage. The totem-pole PFC achieves ZVS using GaN’s near-zero Coss to discharge the switch node before turn-on, eliminating capacitive switching losses and enabling measured PFC efficiencies of 98.4–99.3% at 100–300 kHz. This contrasts directly with the hard-switched interleaved boost PFC of SAE 2024-26-0134, which cannot leverage these properties.

Stage 1 — Totem-Pole PFC: Zero-Voltage Switching and Interleaving for EMI Suppression

The bridgeless totem-pole PFC consists of two high-frequency GaN switching legs and two low-frequency silicon rectifier legs. The GaN legs operate in Critical Conduction Mode (CrM) or Triangular Current Mode (TCM), where the inductor current waveform’s triangular profile naturally creates a negative current interval that discharges the switch node’s output capacitance (Coss) before the incoming switch turns on — achieving full-cycle Zero-Voltage Switching (ZVS). Because GaN has near-zero Coss compared to SiC (GaN Coss ≈ 50–120 pF versus SiC Coss ≈ 150–300 pF at 400V), the resonant dead time required for ZVS is shorter, allowing higher practical switching frequency. IEEE and Navitas papers confirm full-load PFC efficiency of 98.8% at 500 kHz in a 1.5 kW GaN CRM totem-pole PFC prototype (IEEE OSTI, 2021).

In a two-phase interleaved configuration — two GaN legs switching 180° out of phase — input current ripple cancels, reducing the EMI filter size by up to 75% and DM (differential-mode) EMI by 20 dB. A dual-phase interleaved GaN MHz totem-pole PFC prototype demonstrated 99% peak efficiency and 220 W/in³ power density — a benchmark that makes it the most compact PFC solution ever measured at this power class (ResearchGate, 2024).

Stage 2 — Dual Active Bridge (DAB) DC-DC: ZVS, Galvanic Isolation, and Bidirectionality

The DAB DC-DC converter uses full-bridge switching stages on both the primary (400V DC link) and secondary (battery-side) using 650V GaN HEMTs. A high-frequency planar transformer provides galvanic isolation between the grid-side circuit and the battery pack — a safety-critical requirement under IEC 62368-1 and AIS-038 Rev 2 (India’s EV safety standard). The DAB operates with ZVS by controlling the phase shift between primary and secondary bridge switching signals, with leakage inductance of the planar transformer acting as the resonant element. Output voltage range is 200–450V for a standard 400V battery architecture, supporting pack SoC from 20% to 100%.

The topology is inherently bidirectional: reversing the phase shift direction reverses power flow, enabling V2G and V2H without any additional hardware. Production benchmark: Changan Qiyuan E07 (November 2024) — world’s first series-production EV with a commercial GaN OBC using Navitas GaNSafe devices. Measured 15–20% lower lifetime charging losses vs. Si-based OBC.

India-Specific Technical Constraints: Why the GaN OBC Is the Right Answer for Indian EV Platforms

▸ Direct Answer India’s EV market is dominated by AC home and workplace charging on a 230V, 50 Hz single-phase grid that operates within a ±6% statutory voltage tolerance under IS 12360 (185–253V worst-case at the meter). Indian EV OBCs must handle this extended input range while maintaining ≥96% efficiency — a requirement that GaN totem-pole PFC circuits meet natively, as their ZVS control adapts dynamically to input voltage variation without efficiency penalty.

India’s 230V Grid Reality: Extended Input Range and IS 12360 Compliance

India’s single-phase distribution grid operates nominally at 230V AC, 50 Hz, under CEA guidelines. End-of-feeder voltage sag in semi-urban and rural areas can reduce supply voltage to 190–200V during peak load hours, while unloaded circuits in newer developments can exceed 240V. The IEC 61851-1 Type 2 AC charging standard specifies an input voltage range of 90–264V AC for compliant OBCs — and this full range is operationally relevant in India, unlike Europe where low-voltage events below 207V are rare in urban areas.

A GaN totem-pole PFC operating in CrM with ZVS control maintains efficiency above 96% across the full 90–264V input range because the control loop dynamically adjusts switching frequency and dead time to preserve ZVS across all line voltages. A 1.5 kW GaN CRM totem-pole PFC prototype (IEEE OSTI, 2021) demonstrated full-load efficiency above 96% at 90V input and above 98.4% at 230V input — confirming that the wide input range does not degrade GaN OBC efficiency in the way it degrades fixed-frequency SiC OBC stages.

Underbody Packaging, BOM Cost in INR, and Platform-Level Impact

India’s volume EV platforms — Tata Nexon EV (~350V, 7.2 kW OBC), Tata Curvv EV (7.2 kW AC / 70 kW DC), MG ZS EV, Mahindra XUV400 — operate in the 310–420V battery voltage range, well within GaN’s 650V operational ceiling. Underbody OBC volume allocation in compact crossover platforms typically ranges from 2.0–3.5 L with mass budgets of 1.5–2.5 kg. A GaN OBC at 2.2 kW/L and 1.4 kg occupies approximately 3 L at 6.6 kW — versus a SiC OBC at 1.4 kW/L requiring 4.7 L for the same output. The 1.7 L freed volume and 800–1,000g mass reduction have direct platform-level consequences: lower vehicle CoG, freed space for battery capacity extension, or thermal management packaging.

On BOM cost: IDTechEx projects GaN power device cost to converge with SiC in the sub-650V segment by 2028–2030, driven by GaN-on-Si 200mm wafer fabrication scaling on existing silicon CMOS lines. SiC substrate cost remains approximately 50% of total device BOM (Electropages, 2024). For a high-volume OEM producing 1 lakh (100,000) EVs per year at a target OBC BOM of ₹12,000–18,000 per unit, a 15–20% GaN device cost reduction represents ₹18–36 crore (INR) in annual savings at scale — a figure that directly enters platform profitability calculations for Indian EV programs targeting sub-₹15 lakh vehicles.

V2G Infrastructure Readiness and India’s DISCOM Pilot Context

DISCOMs in Maharashtra (MSEDCL), Karnataka (BESCOM), and Rajasthan (JVVNL) are actively piloting V2G tariff frameworks. The GaN totem-pole PFC + DAB OBC topology is inherently bidirectional — V2G power export is a firmware control-loop reversal, not a hardware change. An Indian OEM that adopts a GaN OBC today is deploying hardware that is future-compatible with V2G grid services and V2H home energy management without a mid-cycle platform redesign.

The Verdict: GaN Wins the Sub-50 kW OBC in ZVS Topologies; SiC Owns the Traction Inverter

“GaN and SiC are not competing for the same application — they are partitioning the EV power electronics stack by voltage domain and switching frequency requirement. The overlap region — the sub-50 kW OBC and HV DC-DC converter — is definitively GaN territory from 2025 onward, provided ZVS/TCM topology discipline is maintained.” — Synthesised from IDTechEx Power Electronics for EVs 2025–2035; Reali et al. MDPI Micromachines 2024; Mehrotra et al. SAE 2024-26-0134.

Two Technologies, Two Objective Functions — Both Optimally Allocated

The cleanest architectural conclusion is that GaN and SiC are not competing technologies — they are complementary technologies that optimally occupy different positions in the EV power electronics stack. SiC’s 1,200V breakdown, 3.7 W/cm·K thermal conductivity, and decade-long AEC-Q101 reliability data make it the correct and irreplaceable technology for 800V traction inverters operating at 150–250 kW continuous. No commercially credible case exists for GaN in that application before vertical GaN reaches production maturity.

GaN’s zero Qrr, sub-120 pF Coss, AEC-Q101 qualification across multiple suppliers, and GaN-on-Si substrate economics make it the technically superior and increasingly cost-competitive choice for the 6.6–22 kW OBC and HV-to-LV DC-DC converter — but only when deployed in ZVS/TCM soft-switching topologies that neutralise its thermal conductivity disadvantage and eliminate current collapse. The SAE 2024-26-0134 benchmark serves as a permanent caution against deploying GaN in hard-switched legacy architectures optimised for SiC.

The Changan Qiyuan E07’s November 2024 commercial production launch closes the debate on readiness. For Indian EV OEMs — where the OBC handles the dominant share of all charge events, underbody volume is tightly constrained, and BOM cost is scrutinised per rupee — the switch from SiC-based to GaN-based OBC architecture is now a question of supplier qualification timing and topology selection, not technology risk.

	SiC MOSFET	GaN HEMT
Primary application	800V traction inverters; DC fast-charge power stages	Sub-50 kW OBC; HV-to-LV DC-DC converter
Voltage ceiling	1,200V–1,700V (vertical trench)	650V lateral; 1,200V vGaN sampling 2025
OBC efficiency — hard-switched	98.1% (SAE 2024-26-0134, 7.2 kW)	97.2% (SAE 2024-26-0134, 7.2 kW)
OBC efficiency — ZVS/TCM	~97% ceiling	98.4–99.3% (Reali 2024; IEEE OSTI 2021)
Power density (OBC)	1.2–1.6 kW/L	2.2 kW/L (Reali et al. 2024)
Production readiness	10+ years AEC-Q101; Wolfspeed/Infineon/STMicro/ROHM	AEC-Q101 qualified; Navitas in Changan E07 (Nov 2024)
Cost trajectory	SiC boule ~50% device BOM; improving slowly	GaN-on-Si 200mm lines; converging with SiC by 2028–2030

Frequently Asked Questions: GaN vs SiC in Automotive Onboard Chargers